IC Haus iC JX I/O接口(I/O Circuits).pdf

IC-Haus iC-JX I/O接口（I/O Circuits）pdf,IC-Haus iC-JX I/O接口（I/O Circuits）reliming16-Fold 24 V HIGH SIDE DRIVER WITH UC INTERFACE IC HaUsRev a6, Page 3/35PACKAGES MQPF52 to JEDEC StandardPIN CONFIGURATION MQFP52, pitch 0.65 mm PIN FUNCTIONS(top view)No, Name Function22 1011 10 Stage23 VB3 Supply Voltage for l/0 Stages 9...1224 010 o Stage25 09 O Stage26 GNDA Ground(analog)27 NiNT Not InterruptNWRBT38 GNDD的BLFQ28 Do Data bus29D2Data busC-JX Code30 D4 Data busRSETE33 A231 D6 Data busA3/SCK D32A0Adress bus1 31 D633 A2 Adress BusH 2 D2/SOB4A4Adress Bus口aD0/sD1/SOC□TaN|NT35 VDd Supply Voltage(logic,3.5.5 V)匪目目E匪目36 nres Not reset37 BLFQ Blink Frequency38 GNDD Ground (logic39 CLK Clock(optional)40 GNDA Ground (analog)4101 1/0 Stage42 02 1/o StagePIN FUNCTIONS43 VB1 Supply Voltage for I/O Stages 1...4No, Name Function44 103 w/O Stage1 nrd Not read enable45 04 o Stage2 nWr Not write enable46 105 O Stage3 Ncs Not Chip select47 106 1/0 Stage4 Vcc Supply Voltage(analog, 3.5.5 V)48 VB2 Supply Voltage for l/ 0 Stages 5.85 NSP Not Serial /Parallel(Mode)49 107 1/o Stage6 GNDA Ground(analog)50 108 O Stage7 RSET Resistor Setting(10 kS2 optional)51 GNDA Ground(analog8 A3 Adress bus52 VREF External Voltage Reference(optional)9 A-Adress bus10D7Data bAdditional Pin function in sP/ mode11 D5 Data bus(NSP =low)12D3Data bus13 D1 Data bus3 NCs Not Chip Select14 POE Power Output Enable8 SCK Serial Clock15 GNDA Ground (analog)Device d Bit 116 016 o Stage13 Soc Serial out chain17015 0 Stage28SSerial In18 VB4 Supply Voltage for l/O Stages 13...16 29 SOB Serias Out Bus19 1014 0 Stage32A0Device id Bit o20 1013 0 Stage33 A2 Select Chain/Bus21 012 0 Stage34 A4 Enable Interrupt Report SOC/SOBSeparate supply voltages at VB1.4 are possible. All GNDA pins must be connected up externally. GNDAmust be connected to GNDD externally when just one voltage supply is available. VCC and VDD canbe powered either mutually or separately.Orientation of the package label ( JX code.) may vary16-Fold 24 V HIGH SIDE DRIVER WITH UC INTERFACE IC HaUsRev a6, Page 4/35ABSOLUTE MAXIMUM RATINGSBeyond these values damage may occur; device operation is not guaranteed. (Legend: x=1.16,y=1.4)Item Symbol ParameterConditionsFigUnitMinG001 VCC, VDD Supply Voltage-0.3G002 VBYDriver Supply Voltage-0.340G003Ⅳ(o×)Voltages at Io1.16lOx= off40G004 Idc(IOx) Current in IO1.16mAG005'pk(IOx)Pulse current in I01.16lOx =hit=2ms.T<2sG006 Imax( Current in VCC, VDD100100mAGoO7 Imax(VBy) Current in VB1.4-8G008|c(Current in NCS, NWR, NRD, AO. 4, DO.7 with input functionmADO. 7. NRES CLK BLFQ. POE NSPSET VREFG009|(O)Current in do.7. nintDO..7 with output function25mAG010|u(Pulse current in Ncs NWR. NrdPulse width 10100mAAO.4. D0.7. NRES CLK. BLFQall inputs/outputs openNINT NSP POE. O1.16. RSETVREF (latch up test)G011|NESD-voltage, all pinsMIL-STD-883 Methode 3015KVHBM 100 pF discharged over 1.5 k22G012b()Burst transients at Io1.16after lEC 1000-4-4G013TChip temperatureGO14 TsStorage temperature40150THERMAL DATAOperating conditions: VCC= VDD=3.5.5 V, VBy=12. 36 V, GNDA= GNDD=0V, all inputs on defined logic states(high or lowItem SymbolParameterCOnditionsFigMinI Typ.MTo1 TaAmbient temperatureextended temperature range on40TO2Rthja Thermal resistance chip/ambient ppackage mountedPCBAll voltages are referenced to ground unless otherwise statedAll currents into the device pins are positive; all currents out of the device pins are negative16-Fold 24 V HIGH SIDE DRIVER WITH UC INTERFACE IC HaUsRev a6, Page 5/35ELECTRICAL CHARACTERISTICSOperating conditions: VCC =VDD=3.5.5 V, VBy=12.36 V, GNDA= GNDD=0V, RSET=10 kQ2 +1%all inputs on defined logic states(high or low), Tj=-40.125C unless otherwise statedItem Symbol ParameterConditionsTjFigUnitypaxGeneral001ccPermissible Supply Voltage55VCC002 (VCC)Supply Current in VCC20003 (VCC)Supply Current in VCCno supply voltage VBymA004DDPermissible Supply Voltage55VDD005 (VDD) Supply Current in VDDall logic inputs lo =0V ormA(static)hi=VDD006 I(VDD) Supply Current in VDDcontinuous reading cycle all(dynamic200ns. data word 00 and 'FFalternating reCLD0.7)=200pF007 I (VDD) Supply Current in VDDall logic inputs lo=0. 8VmA08 (VDD) Supply Current in VDDall logic inputs hi=2.0V009BPermissible Supply VoltageVB1.4(operating range)010(VBy) Supply Current in VB1.4POe hi, IOx= hi. unbelastet20mA011 (VBy) Supply Current in VB1.4Ox=o仟f510mAESD Clamp Voltage lo10=-10 mAat VCC, VDD, VB1.4, RSET,VREF013c()hiESD Clamp Voltage hi1Q)=10mA10at VCC, VDD, RSET, VREF014|chESD Clamp Voltage hi10=10 mAat∨B14015 CoLoESD Clamp Voltage lo1()=10mA,O×=off17016 Vc(loESD Clamp Voltage hi10=10 mA55at|O1.16017c()hiESD Clamp Voltage hi atVc(hi=V(-VDD1.5NCS, NWR, NRD, AO...4, NRES, DO. 7 as input,CLK,BLFQ, DO.7, NINT, POE, 1()=10 mANSP018 Vc(lo ESD Clamp Voltage lo atDO. 7 as input-15-0.4NCS, NWR, NRD, AO.4, NRES, 10=-10 mACLK. BLFQ. DO.7. NINT. POE」sP10 Stages: High-Side Driver Io1.16101 VsHSaturation Voltage hivsh=VBy-V(0×),0.2(ox)=-15mA102 Vs()hi Saturation Voltage hiVshi=VBy-V(IOx),0.6OX)=-150mA03 Vs(hi Saturation Voltage hi for pulse Vs()hi= VBy-V(IOx).loadI (IOx)=-500 mA, t=2 msT<2s104|c(hiOvercurrent cut-offV(IOx)=0. VBy-3V18-0.6A105it()scsThreshold current for12-0.6AOvercurrent Message106 Vc(lo Free-wheeling Clamp Voltage low I(IOX)=-150 mA-16-12107 SROhiSlew Rate hiCL=0..100pF17ox)=-150mA108 SR(loSlew rate loCL=0….100pF17VusI(IOx)=-150mA16-Fold 24 V HIGH SIDE DRIVER WITH UC INTERFACE IC HaUsRev a6, Page 6/35ELECTRICAL CHARACTERISTICSOperating conditions: VCC =VDD=3.5.5 V, VBy=12.36 V, GNDA= GNDD=0V, RSET=10 kQ2 +1%all inputs on defined logic states(high or low), Tj=-40.125C unless otherwise statedItem Symbol ParameterConditionsTjFigUnityp. Max109|ph(Propagation Delay until lOx:lo→V(Ox)>VO(O×)+1V110 tphl(Propagation Delay until lOx= off v(IOx)<80%(VBy-VsIOx )hi)510 Stages: Current Sources at lo1.16Pull-down Current Source(200 V(IOx)=3V.VBy,202pdPull-down Current Source(600 V(IOx)=3V.VBy600660203 pd0 Pull-down Current Source(2 mA)V(IOx)=3V.VBy;1.62.4mA204)Pull-up Current Source(200 HA)IOx=off,60200240V(Ox)=0V…VBy-3V205|puPull-up Current Source(600 HA)IOx= off,540600660v(Ox)=0V∴VBy-3V206 IpuPull-up Current Source(2 mA)x= off1.62.4mAV(IOx)=0V.VBy-3V207|p()lonTurn-on Time(IOx 90 Ipd(IOx )respCurrent Source aktivox)>90‰pu(×)208 tp(loff Turn-off Timel(1Ox)<10 Ipd(IOx)respCurrent Source inaktivI(IOx)<10% lpu(IOx)209 FuoLeakage Currentx with Input Function or70Output Function with lOx=off;lL2=lH2=|1=|H1=0=|H0=0v(|Ox)=0∨..VB210 Irb(Leakage CurrentConditions see Item-No. 209-1.5mAV(Ox)=-10V.0V211rb0)Leakage CurrentConditions see Item-No. 209200only Input FunctionV(OX)=VBy….vBy+0.3V212|rb()Leakage CurrentConditions see Item-No. 209Anly Input FunctionV(IOx)=VBy +0.3V.VBy +2V213rb()Leakage Currentno supply voltages VBymAV(IO)max= 36V10 Stages: Comparator I01.16301 VtOhiThreshold voltage hilOx with input function82%VCC302 ToLoThreshold voltage loOx with input function%VCC303 Vt(hys HysteresislOx with input function100toys=Vt(hi-Vt(304 Vt(hiThreshold voltage hi referenced IOx with output function5.0to bYVtohi=VBy-V(IOx)305t()lThreshold voltage lo referenced lOx with output function6.7to BYvtOo=VBy-V(○x)306 Vt(hys HysteresislOX with output function,10mVVt(hys =Vt(lo-Vt(hi307 tp(IOX-Dx)Propagation Delay Input lOx to VO-Filter inaktive20Data Output DxThermal shutdown401 Toff1Overtemperatur threshold level 1120145warning402「on1Level 1 release115140403 Thys1Level 1 HysteresisThys1= Toff1-Ton12°C404「of2Overtemperatur threshold level 2140165shutdown405「on2Level 2 Release120145reliming16-Fold 24 V HIGH SIDE DRIVER WITH UC INTERFACE IC HaUsRev a6, Page 7/35ELECTRICAL CHARACTERISTICSOperating conditions: VCC =VDD=3.5.5 V, VBy=12.36 V, GNDA= GNDD=0V, RSET=10 kQ2 +1%all inputs on defined logic states(high or low), Tj=-40.125C unless otherwise statedItem Symbol ParameterConditionsTjFigUnityp406「hys2Level 2 HysteresisThys2= Toff2-Ton21335407△TTemperature difference Level 2 to AT= Toff2-Toff135CLevel 1Bias and Low voltage Detection501 VCCon, Turn-on Threshold VCC, VDD2.42.9VDDon(Power-on release)502 VCCoff, Undervoltage Threshold VCC2.32.52.8VDDoff VDD(Power-down reset503 VCChys, HysteresisVCChys= VCCon-VCCoff130VDDhysVDDhys= VDDon-VDDoff504 tmin()lv Power Down Time required for VCC=0.8 V.VCCofflow voltage detectionVDD=0.8∨. VDDoff505 toffPropagation Delay until Reset12after Low Voltage at VCC,VDD506 Vrefad Reference Voltage for2627529D-ConverterAD-Converter701 Vadc1 ADC-Measurement Range 1 Current and voltage measureBYNot available with preliminary ment High at IO, SELAD0.6Vchip versionsobo01 resp. 0b010702 Vadc2 ADC -Measurement Range 2 Voltage measurement High at IO,Not available with preliminary SELAD='0b010, EME=15Vchip versions703 Vadc3 ADC-Measurement Range 3 Voltage measurement Low at IO0.6SELAD=0b100’.EME=0704 Vadc4 ADC-Measurement Range 4 Voltage measurement Low at IOSELAD ='0b100. VB or VBGmeasurement salad='0b1010b110. EME= 1705 Vadc5 ADC -Measurement Range 5 Total voltage measurement rangeVBSELAD =0b011706 Vadc6 ADC -Measurement Range 6 Temperature measurement125°CSELAD=0b11 1707Vbitlo Bit- Equivalent of voltage EME=00586mV708 VbithiBit-Equivalent of voltageEME 1488mv709Dtemp1 Digital value of temperatureSVREF=0-40°C826863900measurement 1EMP =(774-Dtemp1)/TKtemp1 27C67071275595°C519563608710 TKtemp1 Temperature coefficients∨REF=02162222.271/c711 Dtemp2 Digital value of temperature SVREF =1, V(VREF)=2.5V-40oC931957984measurement 2TEMP =(861-Dtemp2)TKtemp2 27C76180083995585632679712 TKtemp2 Temperature coefficient 2SVREF =1, V(VREF)=2.5V2262412.551/C±0.2%713 f(ICLK) Internal oscillating frequency0912515MH714 tSAR10 Conversion time SAR-converter 1 Current measurement154/SELAD= 0b001f(ICLK)715 tSAR20 Conversion time SAR-converter 2 Voltage measurement Low respUS((ICLK)SELAD=0b010 resp 0b10016-Fold 24 V HIGH SIDE DRIVER WITH UC INTERFACE IC HaUsRev a6, Page 8/35ELECTRICAL CHARACTERISTICSOperating conditions: VCC =VDD=3.5.5 V, VBy=12.36 V, GNDA= GNDD=0V, RSET=10 kQ2 +1%all inputs on defined logic states(high or low), Tj=-40.125C unless otherwise statedItem Symbol ParameterConditionsTjFigUnitTypax716 tSAR30 Conversion time SAR-converter 3 Total voltage measuremen26SELAD =0b011f(ICLK)VBy voltage measurementSELAD=0b101SELAD ge measurementtemperature measurementSELAD=0b111Input RSETB01 V(RSET)Voltage at RSET1.151.221.29B02 R(RSET)Range value for RSET91014kBurst-IndicationCo1 VSPon Input On-Threshold for burst32.9ecognitionC02Ⅳ SPiffput off- Threshold for14Burst-recognitionC03 toffDelay time to Reset after spike at spike duration: 10 ns110VCC VDDPin monitoring GNDA, GNDDHo1 Vt(gnd Threshold voltage for open ciruit65mVdetection on pinsGNDA GNDDH02 tmin()gnd Minimum duration for open circuit V(GNDA, GNDD)=0V.Vt()gnddetectionH03 toffDelay time to reset after open15ircuit detection at gnDA. GNDDUndervoltage detection VB101 VByon Undervoltage message VB1.41.811211:8102 VByof Undervoltage message VB1.41021061.2103 VByhysHysteresisVByhys= VByon-VByoff400104n(Minimum duration forVBy=0.8V…. BYofPower-Down detection105 toffDelay time for undervoltage6Imessage VB1...4uC-Intrface, l/O-Logic, Frequency divider, InterruptKo1 Vt((hiThreshold voltage High atDO...7 with input functionSchmitt-Trigger-InputsNCS NWR. NRD. A0. 4. NRESCLK. BLFQ DO.7. NSP POEKo2 Vt(loThreshold voltage Low atDO. 7 with input function0.8Schmitt-Trigger-InputsNCS NWR. NRD. AO. 4. NRESCLK. BLFQ. DO.7. NSP POEKo3 Vt(Ohys Schmitt-Trigger- Hysteresis at VtOhys=Vt(hi-Vt(()lo150mVinputs NCS, NWR, NRD, A0.4, D0...7 mit EingangsfunktionNRES CLK. BLFQ. DO.7. NSPPOEK04Ⅳs(hSaturation voltage highVs(hi= VDD-VO0.8NINT. DXKO5 Vs()loSaturation voltage low1(=4 mA049NINT DK06 lpdoPull Down current sources at VO=1V. VDD70A0.4,NRES,CLK,BLFQDO. ..7 POE16-Fold 24 V HIGH SIDE DRIVER WITH UC INTERFACE IC HaUsRev a6, Page 9/35ELECTRICAL CHARACTERISTICSOperating conditions: VCC =VDD=3.5.5 V, VBy=12.36 V, GNDA= GNDD=0V, RSET=10 kQ2 +1%all inputs on defined logic states(high or low), Tj=-40.125C unless otherwise statedItem Symbol ParameterConditionsTjFigUnitypKO7 puo)Pull Up current sources at NSP, V(=OV.VDD-1VNCS NWR. NRDKo8 tp(POE- Delay time output enableRL 2402.1 kn. POE: hi-lousJOxPoe to lOx disabledto V(IOx)<80%(VBy∨s(Ox)h)Ko9 toLoPermissible pulse width for00nenable/disable at POEK10 two Permissible burst pulse width at100POEK11 tmin(nres minimum duration for reset at200nsNRESFrequency BLFQ, CLKP01 td(maximum frequency at CLKTBDMHP02 tdomaximum frequency at BLFQTBDMHZCharacteristics: DiagramsOxmanlOxdcFigure 1: DC loadFigure 2: Pulse load16-Fold 24 V HIGH SIDE DRIVER WITH UC INTERFACE IC HaUsRev A6, Page 10/35OPERATING REQUIREMENTS: Parallel uC InterfaceOperating Conditions: VCC=VDD=3.5.5V,VBy =12.36V, GNDA=GNDD=0V, RSET=10k2+1%Ta=0.70C, CL(=150 pF input level lo =0.8V, hi=2.2 V, reference levels according to figure 3Item Symbol ParameterConditionsFigUnitnMaxRead cycle1001 tAR1,tAR2 Setup Time30nsNCS A0. 4 set before nrd hi-lo1002 tDHold Time: NcS. ao. 4 set before4nsNRD Io→hi003|tDWait Time: Data valid after nrd hi>1201004oFHold Time: Data Bus high impedance65nsafter nrd|o→hi1005 tRLRequired Read Signal Duration at NRDnsWrite cycle1006 tAW1, tAw2 Setup Time: NCS, A0.4 set beforeNWRl→hi007|tpSetup timensData valid before nwr lo hi1008 twAHold tim4NCS. AO. 4 stable after NWR lo hi009Hold timData valid after nwr lo-, hi010twRequired Write Signal Duration atnsNWRRead/rite Timing011Recovery Time between cycles165NRD lo→ hi to nrd hi→l,NRD lo; hi to nwr h丶|oNWR lO→ hi to nwr hi→loNWR IO→ hi to nrd hi→loNCSNRDVnout/outputNW/R2.0v一一一一一INvalidFigure 3: Reference levels for displayedvalues of timeigure 4: Read and write cycle for the parallel interface