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A 10Gb/s CMOS Clock and Data Recovery Circuit

上传者: 2019-09-28 19:28:01上传 PDF文档文件 227KB 热度 62次
Thispaperdescribesthedesignofthefirst10-Gb/sCMOSclockanddatarecovery(CDR)circuit.Alinearphasedetector(PD)isintroducedthatcomparesthephaseoftheincomingdatawiththatofahalf-rateclock.TheCDRcircuitalsoincorporatesathree-stageinterpolatingringoscillatortoachieveawidetuningrange.
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