Clock Generators for SoC Processors

Amr M. Fahim received his B.A.Sc, M.A.Sc, and Ph.D. degrees from the

University of Waterloo in Computer Engineering in 1996 and Electrical

Engineering in 1997, and 2000 respecTIvely.

During his graduate studies, he has had research collaboraTIon twice with

industry. In May - August 1996, he worked with Rockwell Semiconductor

Systems (currently Mindspeed) in Newport Beach, California designing lowpower

PLL-based on-chip clock generators for microprocessors. In June -

December 1999, he worked with Texas Instruments designing low-power RF

fracTIonal-N frequency synthesizers.

Upon compleTIon of his Ph.D. degree in 2000, he joined Qualcomm Inc., San

Diego, CA, where he spent four years driving the development of mixedsignal

IC cores for clocking generator systems for integrated analog/digital

Mobile Station Modem (MSM) chipsets. He is currently with Skyworks

Solutions Inc. in Irvine, CA, working on mixed-signal and radio frequency

integrated circuit (RFIC) designs. His research interests include design and

analysis of low-power integrated frequency synthesis techniques and mixedsignal/

RF system-on-a-chip (SoC) processors. He has authored over 25

papers and has several U.S. and European patents to his credit. He has also

been a reviewer for numerous papers sent for publication including the IEEE

Journal of Solid-State Circuits, IEEE Transactions on Circuits and Systems

II, Midwest Symposium on Circuits and Systems, and VLSI Symposium