时间触发嵌入式系统设计模式8051系列微控制器开发可靠应用

《时间触发嵌入式系统设计模式8051系列微控制器开发可靠应用》RapidiTTy FPGARapidiTTy FPGA includes the full source-code forthe PH03Core,which is a full32-bit processor corebased on the MIPS I Instruction Set Architecture(excluding patented instructions).It includes thefollowing peripherals:JTAG Debugging.16-bit Timer.Buffered UART.These peripherals are connected to the processorcore through the use of a dedicated bus,which canbe used to expand the functionality of the PH Core.RapidiTTy BuilderRapidiTTy Builder ships with library code coveringmany common embedded tasks,including reading fromswitc