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SN54AHCT573, SN74AHCT573,pdf(O

上传者: 2022-10-04 06:08:02上传 PDF文件 733.655 KB 热度 7次

The ’AHCT573 devices are octal transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

To ensure the high-impedance state during power up or power down, OE\ should be TIed to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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