SN65LVEP11,pdf(2.5V/3.3V PECL/

The SN65LVEP11 is a differenTIal 1:2 PECL/ECL fanout buffer. The device includes circuitry to maintain known logic levels when the inputs are in an open condiTIon. Single-ended clock input operaTIon is limited to V_CC ≥ 3 V in PECL mode, or V_EE ≤ 3 V in NECL mode. The device is housed in an industry-standard SOIC-8 package and is also available in TSSOP-8 package opTIon.