SDRAM控制器参考设计,Lattice提供的VHDL源代码

SDRAM控制器参考设计,Lattice提供的VHDL源代码

-- Permission:

--   Lattice Semiconductor grants permission to use this code for use

--   in synthesis for any Lattice programmable logic product.  Other

--   use of this code, including the selling or duplication of any

--   portion is strictly prohibited.

-- Disclaimer:

--   This VHDL or Verilog source code is intended as a design reference

--   which illustrates how these types of functions can be implemented.

--   It is the user's responsibility to verify their design for

--   consistency and functionality through the use of formal

--   verification methods.  Lattice Semiconductor provides no warranty

--   regarding the use or functionality of this code.