Ultra Low Power Integrated Circuit Design_ Circuits Systems

We introduce the emerging applications for ultra low power devices in this chapter. Moore’s law continues to drive function integration. The transistor density is defined as the transistor number on one square silicon die that is generally considered the largest manufacturable die. Such a die can now hold over 7 billion transistors. It is about the same as the population of the planet. But whether those transistors are active or not, they consume power. To satisfy Moore’s law, die size has been increasing at the rate of 7 % per year. The operating frequency has doubled every two years. Therefore to meet the performance goal, the supply voltage scales by only ~ 15 % every two years, rather than the theoretical 30 %. Reduction in power consumption is not tracking Moore’s Law. Additionally, at smaller geometries the cost of the fabrication is growing substantially, which affects wafer pricing. Hence both power reduction and cost reduction are not tracking Moore’s Law. This inspires creative thinking and promotes research and development in low power circuits and architecture. So that raises some interesting challenges about power, cost, and performance that need innovative solutions. System-on-chip (SoC) has become a reality since increasing complexity is driving new business models. SoC usually integrates all components of a computer or other electronic system into a single chip. The key electronic chip we focus on is a “system-on-chip”, which is a must for most modern sophisticated devices. It is critical for chip designers to work directly with system designers or customers in product definition in order to meet the design requirements for power, cost, and performance