VIVADO中关于管脚约束错误的一种解决方法

在vivado中,有的IP核已经包含了模块的引脚配置,这样在约束文件中就不用写相应的约束设置。然而在生成位码流的时候就可能会出现如下的错误提示: [DRC UCIO-1] Unconstrained Logical Port: 16 out of 22 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting perfo