DFT_clk_mux_and_DFT_clk_chain.pdf

DFT OCC电路结构以及实现原理 The DFT_clk_mux and DFT_clk_chain are inserted as two separate modules in the top level of the design, but they always function together as a unit. The DFT_clk_mux is inserted between the OCC (On-Chip Clocking) clock generator, usually a PLL (Phase-Locked Loop), and its clock tree