verilog转网表perl脚本

iscas2spice spice netlist generation tool -- version 2.2 by Jingye Xu @ VLSI Group, Dept. of ECE, UIC, June, 2008 This tool reads the ISCAS85 benchmark circuit "*.bench" file and translate the file into SPICE netlist using the given technology and the standard cell library. platform: linux x86 sytem Input: ISCAS85 benchmark circuit: *.bench; standard cell library: stdcells.sclb; standard cell models: stdcells.lib; interconnect paramaters: *.int; Output: SPICE netlist: out.sp The whole procedure of the to ols can be divided into several steps: 1. Gate replacement: replace the gates that can't be found in the with the gates in the standard cell lib. (break.pl) Output: *.bench, *.bench.bak 2. Generate the GSRC files: generate the GSRC files for the fengshui placer. (gsrcgen.pl) Output: gsrcfile/iscas.* 3. Placement: using the fengshui placement tool to perform the component placement. (fs50) Output: gsrcfile/iscas_fs50.pl 4. Generate ISPD file: tanslate the placement results into ISPD98 format file that can be used as the input of the global router. (gsrc2ispd.pl) Output: gsrcfile/iscas.laby.txt 5. Perform the routing: use the labyrinth global router to perform the routing. (mazeRoute) Output: gsrcfile/output 6. Generate the SPICE netlist: use all the available information to generate the final SPICE netlist. (spicegen.pl) Output: out.sp Usage: iscas2spice.pl Iscas85BenchmarkFile [-C/L/N] options: -C :default value, use the RC model for interconnect -L :use the RLC model for interconnect -N :treat interconnect as short circuit wire This package used the fengshui placement tools and labyrinth global routing tools, for information regarding these two free tools, please vist: http://www.ece.ucsb.edu/~kastner/labyrinth/ http://vlsicad.cs.binghamton.edu/software.html For information regarding this software itself please visit: http://wave.ece.uic.edu/~iscas2spice Many thanks to my advisor Masud H. Chowdhury for his support! Many thanks to Charles Thangaraj and Joe Tsaushuan Wu for their valuable information and great help! Revision Information: iscas2spice 1.0 : The first edition. The GSRC file generation is implemented in C++. iscas2spice 2.0 : Rewrote the GSRC files generation part in Perl. iscas2spice 2.1 : Included the support for ISCAS89 sequential benchmark circuit. June 19, 2008 iscas2spice 2.2 : This is the first version with the interconnect options ols can be divided into several steps: 1. Gate replacement: replace the gates that can't be found in the with the gates in the standard cell lib. (break.pl) Output: *.bench, *.bench.bak 2. Generate the GSRC files: generate the GSRC files for the fengshui placer. (gsrcgen.pl) Output: gsrcfile/iscas.* 3. Placement: using the fengshui placement tool to perform the component placement. (fs50) Output: gsrcfile/iscas_fs50.pl 4. Generate ISPD file: tanslate the placement results into ISPD98 format file that can be used as the input of the global router. (gsrc2ispd.pl) Output: gsrcfile/iscas.laby.txt 5. Perform the routing: use the labyrinth global router to perform the routing. (mazeRoute) Output: gsrcfile/output 6. Generate the SPICE netlist: use all the available information to generate the final SPICE netlist. (spicegen.pl) Output: out.sp Usage: iscas2spice.pl Iscas85BenchmarkFile [-C/L/N] options: -C :default value, use the RC model for interconnect -L :use the RLC model for interconnect -N :treat interconnect as short circuit wire This package used the fengshui placement tools and labyrinth global routing tools, for information regarding these two free tools, please vist: http://www.ece.ucsb.edu/~kastner/labyrinth/ http://vlsicad.cs.binghamton.edu/software.html For information regarding this software itself please visit: http://wave.ece.uic.edu/~iscas2spice Many thanks to my advisor Masud H. Chowdhury for his support! Many thanks to Charles Thangaraj and Joe Tsaushuan Wu for their valuable information and great help! Revision Information: iscas2spice 1.0 : The first edition. The GSRC file generation is implemented in C++. iscas2spice 2.0 : Rewrote the GSRC files generation part in Perl. iscas2spice 2.1 : Included the support for ISCAS89 sequential benchmark circuit. June 19, 2008 iscas2spice 2.2 : This is the first version with the interconnect options