The Fundamentals of Efficient Synthesizable Finite State Machine.pdf

ThispaperdetailsprovenRTLcodingstylesforefficientandsynthesizableFiniteStateMachine(FSM)designusingIEEE-compliantVerilogsimulators.ImportanttechniquesrelatedtooneandtwoalwaysblockstylestocodeFSMswithcombinationaloutputsaregiventoshowwhyusingatwoalwaysblockstyleispreferred.Anefficient