Draft Standard for Verilog Hardware
Abstract:TheVerilog®HardwareDescriptionLanguage(HDL)isdefinedinthisstandard.VerilogHDLisaformalnotationintendedforuseinallphasesofthecreationofelectronicsystems.Becauseitisbothmachinereadableandhumanreadable,itsupportsthedevelopment,verification,synthesis,andtestingofhardwaredesigns;the
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