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AT91SAM9260 Preliminary Complete

上传者: 2018-12-25 16:19:44上传 PDF文件 8.48MB 热度 53次
AT91SAM9260 手册AT91SAM9260 Preliminary1. DescriptionThe at91SAM9260 is based on the integration of an ARM926EJ-S processor with fast romand RAM memories and a wide range of peripheralsThe at91 SAM9260 embeds an ethernet MAc. one USB Device Port and a USB Host con-troller. It also integrates several standard peripherals, such as the USART, SPl, TWl, TimerCounters, Synchronous Serial Controller, ADC and MultiMedia Card InterfaceThe aT91SAM9260 is architectured on a 6-layer matrix, allowing a maximum internal bandwidth of six 32-bit buses. It also features an External Bus Interface capable of interfacing witha wide range of memory devices2. AT91SAM9260 Block DiagramThe block diagram shows all the features for the 217-LFBGA package. Some functions are notaccessible in the 208-pin PQFP package and the unavailable pins are highlighted in"Multiplexing on PIO Controller A'"on page 34, Multiplexing on PlO Controller B on page 35Multiplexing on PlO Controller C" on page 36. The USB Host Port B is not available in the208-pin package. Table 2-1 on page 3 defines all the multiplexed and not multiplexed pins noavailable in the 208-PQFP packageTable 2-1Unavailable signals in 208-lead PQfP PackagePIOPeripheral APeripheral BHDPBHDMBPA30SCK2RXD4PA31SCKOTXD4PB12TXD5S|D10PB13RXD5IS D11PC2AD2PCK 1PC3AD3SPI1 NPCS3PC12IRQONCSAmeL6221D-ATARM-12-Mar-07MASTERc小1个令-00TST一ystemJTAG Selection and Boundary ScanController↓个y个乎个个yyTransc.TranscFIORQO-IRQ210/ 100 EthernetImageARM926EJ-S ProcessorMACSensorUSBN卫DRXDOHCIPDCInterfaceICacheFIFOPCKO-PCK1
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