atmel_8284 datasheet
atmel data sheetPin configurations1.1 Pinout-64A (TQFP)and 64M1(QFN/MLF)Figure 1-1. Pinout Atmel ATmega1 69A/ATmega169PAIATmega329A/ATmega 329PAATmega649A/ATmega649PE出xnLCDCAP48 PA3(COM3(RXD,PCINTO)PEOPA4(SEGOINDEX CORNER(TXD/PCINT1)PE146 PA5(SEG1)(XCK/AIND/PCINT2)PE2445 PA6(SEG2(AIN1/PCINT3)PE344 PA7(SEG3)(USCK/SCL/PCINT4)PE4 6PG2(SEG4DI/SDA/PCINT5) PE5PC7(SEG5(DO/PCINT6)PE6841 PC6(SEG6(CLKO/PCINT7)PE7 940 PC5 (SEG7(SS/PCINT8)PB0 1039 PC4 (SEG8SCK/PCINT9)PB1 1138 PC3(SEG9(MOSI/PCINT10)PB21237 PC2(SEG10(MISO/PCINT11)PB31336 PC1(SEG11)(OCOA/ PCINT12)PB414PCO(SEG12(OC1A/PCINT13)PB51534 PG1(SEG13(OC1B/PCINT 14)PB6PGO (SEG14凹图图图囚图图[图86882y858吕当合00000 4 Q Os 9) 0 N Lc山山Q00七aAtmelATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P IDATASHEET SUMMARY 38284FS-AVR-07120141.2 Pinout- 100A (TQFP)Figure 1-2. Pinout Atmel atmega 3290A/ATmega3290PA/ATmega6490A/ATmega6490PTQFP(D N 00 O)cCc o8s8s旨員旨是图图图同图国图固同图圈图圈图圆图网啊网LCDCAP山冈PA3(cM(RXD/PCINTO)PE0 2Q74PA4(SEGOTXD/PCINT1)PE1 3INDEX CORNER冈PA5(sEG1)CK/AINO/PCINTA2P四四PA6(SEG2AIN1/PCINT3)PE35团PA7(sEG3(USCK/SCL/PCINT4) PE4 670 PG2(SEG4DI/SDA/PCINT5)PE5 769 PC7(SEG5)(DO/PCINT6)PE6 88PC6(SEG6)CLKO/PCINT7)PE7巴DNCVCC 1066 PH3(PCINT19: SEG7)GND回PH2(PcNT18sEG)囝4PH1(PC|NT7/SEG9)(PCINT24/SEG35)PJo 13AVR回PHo(PcNT16sEG10)(PCINT25/SEG34)P1 14DNC回DNcDNC 1660DNCDNC回DNC回Pc5(sEG11(SS/PCINT8)PBO 19PC4(SEG12( SCK/PC|NT9PB1园256 PC3(SEG13MOSI/PCINT10)PB2 2155」Pc2(SEG14(MISO/PCINT11)PB322回4Pc1(SEG15(OC1A/PCINT13) PB552 PG1(SEG17(OC1B/PCINT14)PB6 25回Peo(sEG18图悶圆副岛剧固图回团图凹囹图凹8{9居名寸且豆邕蹬邕CCcNote: The large center pad underneath the QFN/MLF packages is made of metal and internally connected to GND. It should be solderedor glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the package might loosen from theboardAtmelATmega 169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET SUMMARY] 41.3 Pinout-64MC (DRQFN)Figure 1-3. Pinout Atmel ATmega1 69A/ATmega169PA[囗囗nh∏Tn∏n∏Table 1-1DRQFN-64 Pinout ATmega 169A/ATmega169PA.PEOPB7PG1 SEG13)PA2(COM2)VLCDCAPPB6PGO (SEG14)PA3 (COM3)PEPG3PCO (SEG12)PA1( COM1)PE2PG4PC1(SEG11)PAO(COMO)PE3RESETPC2(SEG10)VCCPE4VCCPC3(SEG9)GNPE5GNDPC4 (SEG8PFTPE6XTAL2(TOSC2)PC5(SEG7PF6PE7XTAL1 (TOSC1)PC6 (SEG6PF5PBOPDO (SEG22PC7(SEG5)PF4PB1PD1 (SEG21)PG2 (SEG4PF3PB2PD2(SEG20)PA7 SEG3)PF2PB3PD3 (SEG19)PA6 (SEG2)PF1PB5PD4 (SEG18PA4 ( SEGO)PFOPB4PD5 (SEG17)PA5(SEG1)AREFPD7 (SEG15)AVCCPD6 (SEG16GNDAtmelATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET SUMMARY 58284FS-AVR-07120142 OverviewThe Atmel aTmega 169A/169PA329A/329PA/3290A/3290PA649A/649P/6490A/6490P is a low-power CMos 8-bitmicrocontroller based on the Atmel aVR enhanced risc architecture by executing powerful instructions in a single clockcycle, the aTmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P achieves throughputs approaching1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed2.1 Block diagramFigure 2Block diagram工一PORTF DRIVERSPORTA DRIVERSPORTC DRIVERSA真A▲▲DATA FEGISTEDATA REG STERDATA REGISTERORTEREG. PORTEP。RTREG. PORTAPORTG8-BIT DATA BUADCCALIB. OSCAREFOSCILLATORJTAG TA戶PROGRAMSTACKWATCHDOGOINTERG ANDONTROIloN-CHIP DEBJSFAMMCU CONTROCONT ROLLERFLASHREGISTERDRIVERNSTRUCTIONTIMERSCANREGISTERREGISTERSDECODEINTERTUPT F=CONTROLSTATUSVR CPUREG STER下USAFTSPISERAL|NT三 RFACE△ATA REGISTERDATA REGISTEDATA DCATA REGISTERDATA DIRPORTEPORTBREG. PORTDG REG PORTG个个个个个个个PORTE DRIVERSPORTB DRIVERSPORTO DRIVERSPORTG DRIVERSE0- PE7PB0-PB7PD0·PD7PGO-PG4The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers aredirectly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in oneAtmelATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P IDATASHEET SUMMARY 68284FS-AVR-0712014single instruction executed in one clock cycle. The resulting architecture is more code efficient while achievingthroughputs up to ten times faster than conventional cISC microcontrollersThe Atmel ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P provides the followingfeatures: 16K/32K/64K bytes of In-System Programmable Flash with Read-While-Write capabilities, 512/1K/2Kbytes EEPROM, 1 K/2K/4k byte SRAM, 54/69 general purpose I/o lines, 32 general purpose working registers, aJTAG interface for Boundary-scan, On-chip Debugging support and programming, a complete On-chip LCDcontroller with internal contrast control, three flexible Timer/Counters with compare modes, internal and externalinterrupts, a serial programmable USART, Universal Serial Interface with Start Condition Detector, an 8-channel10-bit ADC, a programmable Watchdog timer with internal oscillator, an SPI serial port, and five softwareselectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port,and interrupt system to continue functioning the Power-down mode saves the register contents but freezes theOscillator, disabling all other chip functions until the next interrupt or hardware reset In power-save mode, theasynchronous timer and the lcd controller continues to run allowing the user to maintain a timer base andoperate the LCD display while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPUand all l/o modules except asynchronous timer, LCD controller and ADC, to minimize switching noise during ADCconversions In Standby mode, the XTAL/resonator Oscillator is running while the rest of the device is sleepingThis allows very fast start-up combined with low-power consumptionAtmel offers the Q Touch library for embedding capacitive touch buttons, sliders and wheels functionality into AVRmicrocontrollers. The patented charge-transfer signal acquisition offers robust sensing and includes fullydebounced reporting of touch keys and includes Adjacent Key Suppression(AKs )technology for unambiguousdetection of key events. The easy-to-use QTouch Suite toolchain allows you to explore, develop and debug yourown touch applicationsThe device is manufactured using the Atmel high density non-volatile memory technology. The On-chip In-Systemre- Programmable(ISP) flash allows the program memory to be reprogrammed In-System through an SPI serialinterface, by a conventional non-volatile memory programmer, or by an On-chip Boot program running on the aVRcore. The Boot program can use any interface to download the application program in the application Flashmemory. Software in the Boot Flash section will continue to run while the Application Flash section is updatedproviding true Read-While-Write operationBy combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, theATmega 169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A6490P is a powerful microcontroller thatprovides a highly flexible and cost effective solution to many embedded control applicationsThe ATmega169A/169PA/329A/329PA/3290A/3290P A/649A/649P/6490A/6490P AVR is supported with a fullsuite of program and system development tools including C Compilers, Macro Assemblers, ProgramDebuggerSimulators, In-Circuit Emulators, and Evaluation kitsAtmelATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET SUMMARY 78284FS-AVR-07120142.2 Comparison between Atmelfabe2
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