xilinx Vivado HLS技术性能优化指南

该文档描述了使用HLS技术时如何进行性能优化，例如如何减少时延或减少面积。Vivado® 高层次综合（HLS）在所有 Vivado HLx 版本中以免费升级形式提供，可以实现直接使用 C，C++ 以及 System C 语言规范对赛灵思可编程器件进行编程，无需手动创建 RTL，从而可加速 IP 创建。&A XILINXALL PROGRAMMABLETable of contentsRevision History2Chapter 1: Introduction..6HLS Pragmas6OpenCL Attributes…………………….….,..,,,......8DirectivesChapter 2: Optimizing the hardware functionHardware Function optimization methodology. ...............................................................12Baselinethehardwarefunctions.www...ww14Optimization for Metrics.15Pipeline for performance.............自4。。音自非。p音。。。非。·自自自申。自自非非16Chapter 3: Optimize Structures for Performance21ReducingLatency............,.,24Reducing area......25Design Optimization Workflow27Chapter 4: Data Access Patterns.o.29Algorithm with Poor Data Access Patterns29Algorithm With Optimal data Access Patterns38Chapter 5: Standard Horizontal Convolution.......40Optimal Horizontal Convolution....……………………………………43Optimal vertical convolutionOptimal Border Pixel Convolution……………47Optimal Data Access Patterns.49Appendix A: OpenCL Attributes.50always_inline......51opencl_ unroll hint.,…,…52reqd_work_group_size·····:······:···············:········中…54vec_type_hint..55UG1270(V20181)Apri4,2018www.xilinx.comSend feedbackVivado HLS Optimization Methodology Guideork_group_size_hint。非D。自自自57xcl array partition58Xcl_ array_reshape……XC_data_pack……,……,……,…,…………,………鲁音·非看普非非着·非.64xc dataflow,65xcl dependence自;;。非。非非非自,。。。着。。音自非音音。自自非。自。自垂。自·非非非着自·非非非··非着音非非67xcl_max_work_group_size。音。。音非非70xcl_pipeline_loop171xcl pipeline workitems72Xcl_regd_pipe_ depth…73xc zero_ global_work_oft..,……75Appendix B: HLS Pragmas。非。。音音音自。。音。。曲音鲁音。·音音。pragma HLs allocation…,78pragma hls array_map80pragma hLs array_partition..,,,…,…83pragma hls array_reshape85pragma HLS clock……·····。···非非,非··;非···“··。自。·。非p。··中非·87pragma HLS data_pack89pragma hLs dataflow.…91pragma hls dependence.....,.,.,…,…,…,,...94pragma hls expression_ balance.....97pragma HLS function_ instantiate……98pragma HLS inline。。99pragma HLS interface,,…,…,…,…,…,…,…,…,…,…,…,…,…,…,…,……,…………102pragma hLs latency.…107pragma HLs loop_ flatter.……….,,…,…,…,…,…,…,…,…,…,…,……,……109pragma hLs loop_merge ..................................111pragma HLs loop_tripcount.....112pragma HLS occurrence.…114pragma HLS pipeline.…,…116pragma HLs protocol118pragma hls reset音4非D····d····非.···非自·非非。·非非119pragma hLs resource.……120pragma hls stream122pragma HLS top...….….….….….….…..….….…..124pragma HLS unroll.……125Appendix C: Additional Resources and Legal Notices129UG1270(v20181)Apri4,2018www.xilinx.comSend feedbackVivado hls optimization Methodology guide&A XILINXALL PROGRAMMABLEReferences……129Please Read: Important Legal Notices.130UG1270(V20181)Apri4,2018www.xilinx.comVivado HLS Optimization Methodology GuideSend feedback&A XILINXChapter 1: IntroductionALL PROGRAMMABLE,Chapter 1IntroductionThis guide provides details on how to perform optimizations using Vivado hls. The optimizationprocess consists of directives which specify which optimizations are performed and amethodology which shows how optimizations may be applied in a deterministic and efficientmannerHLS PragmasOptimizations in Vivado hlsIn both SDAccel and sdsoc projects, the hardware kernel must be synthesized from the openClC or C++ language into rtl that can be implemented into the programmable logic of a xilinxdevice. Vivado hls synthesizes the rtl from the openCl, C, and c+t language descriptionsVivado hls is intended to work with your Sdaccel or sdsoc development Environment projectwithout interaction. However, Vivado hls also provides pragmas that can be used to optimizethe design: reduce latency, improve throughput performance and reduce area and deviceresource utilization of the resulting rtl code these pragmas can be added directly to the sourcecode for the kernelIMPORTANTIAlthough the sdsoc environment supports the use of hls pragmas, it does not support pragmasapplied to any argument of the function interface(interface, array partition, or data_pack pragmasRefer to"Optimizing the hardware function"in the SDSoc Environment Optimization Guide UG1235)for more informationThe vivado hls pragmas include the optimization types specified below:UG1270(V20181)Apri4,2018www.xilinx.comVivado hls optimization methodology guideSend feedback6&A XILINXChapter 1: IntroductioALL PROGRAMMABLEnTable 1: Vivado hls Pragmas by TypeTypeAttributesKernel Optimizationpragma HLS allocationragma hls clockpragma HLS expression_balancepragma hLs latencypragma HLS resetragma hls resourcepragma HLS toFunction Inliningpragma HLS inlinepragma HLS function_instantiateInterface Synthesispragma HLS interface° pragma hls protocolTask-level pipelinepragma HLS dataflowpragma HLS streamPipelinggma HLS pipelinepragma HLS occurrenceUnrollpragma HLS unrollpragma HLS dependenceLoop Optimizationpragma HLS loop_flatten° pragma HLS loop_mergepragma HLS loop_tripcountArray optimization° pragma HLS array_mappragma HLS array_partitionpragma HLS array_reStructure Packing° pragma HLS data_packUG1270(V20181)Apri4,2018www.xilinx.comVivado hls optimization methodology guideSend feedback7&A XILINXChapter 1: IntroductionALL PROGRAMMABLEnOpen CL AttributesOptimizations in OpencLThis section describes Open Cl attributes that can be added to source code to assist systemoptimization by the sdaccel compiler, xocc, the sdsoc system compilers, s d scc and sds++,and vivado hls synthesisSDx provides open cl attributes to optimize your code for data movement and kernelperformance. the goal of data movement optimization is to maximize the system level datathroughput by maximizing interface bandwidth utilization and ddr bandwidth utilization thegoal of kernel computation optimization is to create processing logic that can consume all thedata as soon as they arrive at kernel interfaces. this is generally achieved by expanding theprocessing code to match the data path with techniques such as function inlining and pipeliningloop unrolling, array partitioning, dataflowing, etc.The OpenCl attributes include the types specifed below:Table 2: OpenCL attributes by TypeTypeAttributesKernel size° reqd_work_group_sizeec_ typework group size hintxcl_max_work_group_sizexcl_zero_global_work_offsetFunction Inliningalways inlineTask-level Pipelinexcl datafloxcl_reqd_pipe_ depthPipelincl pipeline loxcl_pipeline_workitemsLoop Unrollingopencl_unroll_hintUG1270(V20181)Apri4,2018www.xilinx.comVivado HLS Optimization Methodology GuideSend feedback&A XILINXChapter 1: IntroductionALL PROGRAMMABLEnTable 2: OpenCL_ attributes by type (cont'd)TypeAttributesArray optimizationxcl_array_partitionxcl_array_reshapeNote: Array variables only accept a single arrayoptimization attributeTIP: The SDaccel and SDSoc compilers also support many of the standard attributes supported bygcc, such as aIways_inline, noinline, unroll, and nounro11DirectivesTo view details on the attributes in the following table see the command reference section inVivado design Suite User Guide: High-Level Synthesis (UG902)Table 3: Vivado hls Pragmas by TypeTypeAttributesKernel Optimizationset directive allocationset directive clockset_directive_expression_balanceset directive resetset directive resourcet_directive_topFunction Inliningset directive inlineset directive function instantiateInterface Synthesisset directive interfaceset directive protocolk-level pipelinipneset directive dataflowset directive streamUG1270(V20181)Apri4,2018www.xilinx.comVivado hls optimization methodology guideSend feedback&A XILINXChapter 1: IntroductioALL PROGRAMMABLEnTable 3: Vivado Hls Pragmas by Type ( cont'dTypeAttributesPipelineset_directive_pipelineset directive occurrenceLoop Unrollingset directive dependenceLoop Optimizationset_directive_loop_flattenset directive loop mergeset_directive_loop _tripcountArray Optiset directive_array_mapset_directive_array_partitionset directive array reshapeStructure Packing° set directive_ data_packUG1270(V20181)Apri4,2018www.xilinx.comVivado HLS Optimization Methodology GuideSend feedback0