IEEE Standard Verilog HDL 1364-2001

TheVerilogHardwareDescriptionLanguage(HDL)isdefinedinthisstandard.VerilogHDLisaformalnotationintendedforuseinallphasesofthecreationofelectronicsystems.Becauseitisbothmachinereadableandhumanreadable,itsupportsthedevelopment,verification,synthesis,andtestingofhardwaredesigns;thecommuni