Art of Writing TestBenches
ArtofWritingTestBenchesArtofWritingTestBencheshttp://www.asic-world.com/verilog/art_testbench_writing.htmlJan-2-2006IntroductionBeforeyouStartExample-CounterCodeforCounterTestPlanTestCasesWritingTestBenchTestBenchTestBenchwithClockgenTestBenchcontinues...AddingResetLogicCodeofresetlogicAddingtestcaselogicTestCase1-Asserting/De-assertingresetTestCase2-Assert/De-assertenableafterresetisapplied.TestCase3-Assert/De-assertenableandresetrandomly.AddingcompareLogicIntroductionWritingtestbenchisascomplexaswritingtheRTLcodeitself.ThisdaysASIC'saregettingmoreandmorecomplexandthusthechallengetoverifythiscomplexASIC.Typically60-70%oftim
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