FIR滤波器 VHDL实验报告

有时序图、程序.LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_unsigned.all;ENTITYFIRisport(clk,res,clr,set:instd_logic;clk_regbt,clk_reg:bufferstd_logic;Din:instd_logic_Vector(7downto0);Dout:outstd_logic_vector(18downto0));ENDFIR;